Course title
計算機アーキテクチャ基礎   [Basic Computer Architecture]
Course category technology speciality courses,ets.  Requirement   Credit 2 
Department   Year 24  Semester Spring 
Course type Spring  Course code 022806
Instructor(s)
中條 拓伯   [NAKAJO Hironori]
Facility affiliation Faculty of Engineering Office   Email address

Course description
The aim of this course is to understand a structure of a computing system especially on a inner processor architecture. Students can learn how to gain higher performance and put to practical use from conventional technologies in computer architecture.
Expected Learning
Can explain a configuration of a computing system and inner processor micro-architecture.
Can judge basic cache memory and its effects quantitatively.
Can explain the principle of a virtual memory technology including hardware supports.
Can judge performance of a computer quantitatively.
Course schedule
#1: Performance of a computer system

#2: Instruction set of a 32 bit RISC processor

#3: Control of inside of a processor

#4: Improvement in a computing system

#5: Cache memory

#6: Virtual memory
Prerequisites
Based of a course "Logic Circuit."
Required Text(s) and Materials
Hironori Nakajo and Kohta Ohshima: Practical Computer Architecture, Suri-Kogaku-sha
References
L.Hennessy,David A.Patterson: Computer Architecture: Quantitative Approach 5th Edition, Shoei-sha.
Assessment/Grading
Midterm and the Final Exam
Message from instructor(s)
Course keywords
Computer architecture, Instruction set, memory architecure, micro-architecture
Office hours
Remarks 1
Remarks 2
Related URL
Lecture Language
Japanese
Language Subject
Last update
3/22/2017 1:39:43 PM