Course title
集積回路   [Integrated Circuit]
Course category	technology speciality courses,ets.	Requirement		Credit	2
Department		Year	3～4	Semester	Spring
Course type	Spring	Course code	023804
Instructor(s)
中條 拓伯   [NAKAJO Hironori]
Facility affiliation	Faculty of Engineering	Office		Email address

Course description

This course is the final stage of designing a computing system from courses of Logic Circuit and Computer Architecture based on a hardware description language towards VLSI designing.

Expected Learning

Can design a hardware system with a hardware description language. Can confirm a designed hardware via simulation. Can understand operations in a processor designed with a hardware description language. Can add new instructions to the processor with a hardware description language.

Course schedule

#1: Practical design of a digital circuits. #2: Inner structure of a computing system and a processor. #3: Design methodology with a hardware description language (HDL). #4: Designing a processor with an HDL.

Prerequisites

Based of "Logic Circuit" and "Computer Architecture."

Required Text(s) and Materials

CQ Endeavor Verilog HDL, CQ Publisher

References

Hironori Nakajo and Kohta Ohshima: Practical computer architecture, Suri-Kogaku-sha

Assessment/Grading

Small report in each class and the final report.

Message from instructor(s)

Course keywords

Circuit design, LSI design, hardware desctiption language

Office hours

Remarks 1

Remarks 2

Related URL

Lecture Language

Japanese

Language Subject

Last update

3/22/2017 1:40:08 PM