| Course title | |||||
| 計算機アーキテクチャ基礎 [Basic Computer Architecture] | |||||
| Course category | technology speciality courses,ets. | Requirement | Credit | 2 | |
| Department | Year | 2～4 | Semester | 1st | |
| Course type | 1st | Course code | 022806 | ||
| Instructor(s) | |||||
| 中條 拓伯 [NAKAJO Hironori] | |||||
| Facility affiliation | Faculty of Engineering | Office | Email address | ||
| Course description |
| The aim of this course is to understand a structure of a computing system especially on a inner processor architecture. Students can learn how to gain higher performance and put to practical use from conventional technologies in computer architecture. |
| Expected Learning |
|
Can explain a configuration of a computing system and inner processor micro-architecture. Can judge basic cache memory and its effects quantitatively. Can explain the principle of a virtual memory technology including hardware supports. Can judge performance of a computer quantitatively. See the Curriculum maps. |
| Course schedule |
|
#1. Contents of the course and its significance #2．Numeric expression in a computer: fixed and floating point number #3．Instruction and operand of a computer and a basic pipeline #4．Performance of computer architecture #5．Memory hierarchy: Basic cache memory #6．Memory hierarchy: Implementation of cache memory and significance #7．Review (Intermediate Test) #8．Fallacies and pitfalls (commentary of the Intermediae Test) #9．Memory hierarchy: Basic virtual memory #10．Memory hierarchy: Implementation of virtual memory and operation analysis #11. Micro-architecture of MIPS prosessor No.1: Basic datapath #12．Micro-architecture of MIPS prosessor No.2: Inner control and a state machine #13．Inner parallelism for higher performance No.1: Structure of pipeline and drawback #14．Inner parallelism for higher performance No.2: Overcoming problems in pipeline #15．Total review (Regular Test) |
| Prerequisites |
|
Based of a course "Logic Circuit." In addition to 30 hours that students spend in the class, students are recommended to prepare for and revise the lectures, spending the standard amount of time as specified by the University and using the lecture handouts as well as the references specified below. |
| Required Text(s) and Materials |
| Hironori Nakajo and Kohta Ohshima: Practical Computer Architecture, Suri-Kogaku-sha |
| References |
| L.Hennessy，David A.Patterson: Computer Architecture: Quantitative Approach 5th Edition, Shoei-sha. |
| Assessment/Grading |
| Midterm and the Final Exam, each 50%. |
| Message from instructor(s) |
| Course keywords |
| Computer architecture, Instruction set, memory architecure, micro-architecture |
| Office hours |
| Via e-mail for an appointment or before or after each class |
| Remarks 1 |
| Remarks 2 |
| Related URL |
| Lecture Language |
| Japanese |
| Language Subject |
| Last update |
| 3/19/2019 2:55:30 PM |