| Course title | |||||
| 計算機アーキテクチャ演習 [Computer Architecture : Laboratory Exercises] | |||||
| Course category | technology speciality courses,ets. | Requirement | Credit | 1 | |
| Department | Year | 2～4 | Semester | 1st | |
| Course type | 1st | Course code | 022810 | ||
| Instructor(s) | |||||
| 大島 浩太 [OSHIMA Kota] | |||||
| Facility affiliation | Graduate School of Engineering | Office | Email address | ||
| Course description |
| This course provides students with the basic knowledge of CPU architecture by using the explanation of MIPS CPU architecture and QtSpim Emulator. The course is constructed 2 parts. One is the assemble language programing; the other is the lecture of MIPS CPU architecture. |
| Expected Learning |
|
Learners who successfully complete this course will be able to: (1) Understanding how to program assemble language (2) Understanding how to process machine language in CPU (3) Understanding of core functions of CPU |
| Course schedule |
|
The first half of the course will learn about assemble language programming by using QtSpim MIPS CPU emulator, the second half will learn about CPU architecture. The lecture will perform 4 types of themes according to following topics: 1. operation principles of MIPS assemble language 2. experiment of MIPS assemble programming by emulator 3. relations between assemble language and machine language 4. basics of MIPS architecture |
| Prerequisites |
| Required Text(s) and Materials |
| handouts |
| References |
|
コンピュータの構成と設計―ハードウエアとソフトウエアのインタフェース(上), ジョン・L. ヘネシー,デイビッド・A. パターソン(著)，日経BP社 コンピュータの構成と設計―ハードウエアとソフトウエアのインタフェース(下), ジョン・L. ヘネシー,デイビッド・A. パターソン(著), 日経BP社 |
| Assessment/Grading |
| Message from instructor(s) |
| Course keywords |
| CPU Architecture, RISC, CISC, MIPS, assembly language, Programming |
| Office hours |
| On demand. |
| Remarks 1 |
| Remarks 2 |
| Related URL |
| Lecture Language |
| Japanese |
| Language Subject |
| Last update |
| 3/10/2020 11:00:03 AM |