Course title
集積回路   [Integrated Circuit]
Course category	technology speciality courses,ets.	Requirement		Credit	2
Department		Year	3～4	Semester	1st
Course type	1st	Course code	023804
Instructor(s)
中條 拓伯   [NAKAJO Hironori]
Facility affiliation	Faculty of Engineering	Office		Email address

Course description

This course is the final stage of designing a computing system from courses of Logic Circuit and Computer Architecture based on a hardware description language towards VLSI designing.

Expected Learning

Can design a hardware system with a hardware description language. Can confirm a designed hardware via simulation. Can understand operations in a processor designed with a hardware description language. Can add new instructions to the processor with a hardware description language. See the Curriculum maps.

Course schedule

#1. Hardware Description Language Verilog HDL and how to use an RTL simulator #2．Grammar of Verilog No.1: Combinational and sequential circuits #3．Grammar of Verilog No.2: Operator and applied circuits #4．Grammar of Verilog No.3: Testbench and system design #5．Grammar of Verilog No.4: Designing a finite state machine #6．Machine code and instruction format of MIPS prosessor #7．Micro-architecture of MIPS prosessor (1st) #8．Micro-architecture of MIPS prosessor (2nd) #9．HDL design of MIPS processor and RTL simulation of the processor (1st) #10．HDL design of MIPS processor and RTL simulation of the processor (2nd) #11. FPGA implementation of MIPS processor #12．Design of a 4 bit signed calculator #13．FPGA implementation of a 4 bit signed calculator #14．Hardware acceleration (1st) #15．Hardware acceleration (2nd)

Prerequisites

Based of "Logic Circuit" and "Basic Computer Architecture." In addition to 30 hours that students spend in the class, students are recommended to prepare for and revise the lectures, spending the standard amount of time as specified by the University and using the lecture handouts as well as the references specified below.

Required Text(s) and Materials

Original PDF files and some other sites on Verilog HDL grammar.

References

Hironori Nakajo and Kohta Ohshima: Practical computer architecture, Suri-Kogaku-sha

Assessment/Grading

Small report in each class and the final report.

Message from instructor(s)

Course keywords

Circuit design, LSI design, hardware desctiption language

Office hours

Via e-mail for before or after each class

Remarks 1

Remarks 2

Related URL

Lecture Language

Japanese

Language Subject

Last update

3/19/2019 2:55:43 PM