| Course title | |||||
| 並列処理・ネットワーク特論 [Parallel Processing and Computer Networks] | |||||
| Course category | courses for master's programs | Requirement | Credit | 2 | |
| Department | Year | ～ | Semester | 3rd | |
| Course type | 3rd | Course code | 1060603 | ||
| Instructor(s) | |||||
| 中條 拓伯 [NAKAJO Hironori] | |||||
| Facility affiliation | Faculty of Engineering | Office | Email address | ||
| Course description |
|
【Google Classroom Class code】 ak2zjs4 Currently, high performance computers consist of multiple computers connected via network and perform parallel processing efficiently. In this class, we discuss processor technologies especially on cache memory in a computing system. Cache technology for multi-processing is discussed, too. |
| Expected Learning |
|
Can explain parallel processing system architecture. Can judge performance of the parallel computing system quantitatively. Can apply basic knowledge on parallel processing to the students' own researches. |
| Course schedule |
|
This course uses the famous text book "Computer Architecture Quantitative Approach" and make presentation of the assigned subsection in the Chapter5, thread level parallelism. The Content of the course is as follows: #1. Basic concept of parallel processing and its purpose #2. Basic Data communication in parallel processing: shared memory and message passing #3. Presentation of communication protocol using shared memory1 #4. Presentation of communication protocol using shared memory2 #5. Basic concept of cache memory in a single processor #6. Cache organization for shared memory: Basic protocol #7. Presentation of cache coherence protocol: Basic protocol #8. Cache organization for shared memory: Other outstanding protocols #9. Presentation of cache coherence protocol: Other outstanding protocols No.1 #10. Presentation of cache coherence protocol: Other outstanding protocols No.2 #11. Presentation of cache coherence protocol: Other outstanding protocols No3 #12. Presentation of the surveyed advanced technology for acceleration No.1 #13. Presentation of the surveyed advanced technology for acceleration No.2 #14. Presentation of the surveyed advanced technology for acceleration No.3 #15. Presentation of the surveyed advanced technology for acceleration No.4 |
| Prerequisites |
|
Basic knowledge on system programming and network is required. In addition to 30 hours that students spend in the class, students are recommended to prepare for and revise the lectures, spending the standard amount of time as specified by the University and using the lecture handouts as well as the references specified below. |
| Required Text(s) and Materials |
| Poper Point files will be given in every lecture. |
| References |
|
John L. Hennessy and David Patterson: "Computer Architecture Quantitative Approach 6th Edition" |
| Assessment/Grading |
|
Small report in each lecture Final report on dedicated topics in advanced computing system |
| Message from instructor(s) |
| Course keywords |
| Parallel processign, processor architecture, Parallel architecture |
| Office hours |
| Remarks 1 |
|
The class is changed from the Thursday 3rd slot to the Tuesday 5th slot. Because a foreign student from Germany will take this class remotely. The 3rd slot is too early to attend the class in 7 hours difference. |
| Remarks 2 |
| Related URL |
| Lecture Language |
| Language Subject |
| English |
| Last update |
| 9/30/2022 3:48:43 AM |